Micro-Electronics Engineer


This position is supporting our client ESA at their ESTEC location in Noordwijk in the Netherlands. In this large European agency, you will find an excellent and modern working environment with challenging tasks and responsibilities with the opportunity to gain exposure to various projects and missions at the heart of European space research and development.

If you are successful in this position you are guaranteed a very competitive salary, a permanent Dutch contract, Industry leading base salary, full healthcare, pension contribution, 30 days’ vacation, annual training budget, access to the ESTEC social club membership and a relocation package if required.

Location: Darmstadt/Germany
Deadline to apply: 15th September
How to apply: contact@c-ssystems.de
Reference: DER/PLC/21/50

Responsibilities/ Duties /Tasks

  • Provide VLSI (ASIC & FPGA) technical expertise to Projects involving requirements analysis, performance and budgets analysis, writing and assessment of VLSI specifications.
  • Review, evaluation and checking of industrial contractor’s VLSI designs.
  • Identify design deficiencies and problem areas and proposals for their solutions.
  • Design, analysis, verification of VLSI systems for control and data processing applications, and/or signal processing using industrial standard tools, hardware description and programming languages.
  • Technical and administrative management of the ESA SystemC and synthesizable VHDL IP Core pool of designs. This work will involve:
  1. optimisation, update, and overall maintenance and of the ESA VHDL IP Cores databases
  2. provision of technical support to ESA IP Cores users (performing analysis and finding solutions to problems in VHDL code, documentation, or design methodology)
  3. holding a strong collaboration with our Contracts department in arranging and solving licences and patent issues
  4. advertising the ESA IP service (website, workshops, etc.), handling IP cores requests and their distribution

You will support ASIC and/or FPGA technology developments for R&D and /or projects, supervising that good design practices and manufacturing and test methodologies are applied.

Independent verification (through code inspection, simulation and timing analysis) and validation (through HW tests) will have to be carried out for some ASIC and FPGAS developments.

When asked to support development contracts regarding the above areas, you will act as the activity technical responsible, maintain interfaces with the prime contractors, participate in progress meetings and reviews, as requested, and provide appropriate feedback on the achieved progress and discussions.

When supporting projects you will interface with ESA’s project teams, the prime and lower-level contractors, participate in progress meetings and reviews, as requested by project work, and provide appropriate feedback on the achieved progress and discussions.


You will have a Master’s in engineering and at least 4 years of relevant work experience.

  • Experience in the design of complex microelectronics systems, and familiarity with Industry standard VLSI/ASIC/FPGA CAD tools (e.g. CADENCE, SYNOPSYS, MENTOR, MATLAB, SPW) etc. is essential
  • Experience in hardware description languages (VHDL and/or Verilog HDL, SystemC) is essential.
  • Being familiar with the Space applications of microelectronics
  • Having knowledge of Space environment and quality requirements will be an important asset, but it is not mandatory.
  • Experience with using third party Intellectual Property (IP) designs (in VHDL and/or SystemC) is a requirement.
  • Fluent in English; knowledge of another ESA member-state language is an asset
About the author